The present invention relates to a technique effective for use in reducing a DC offset of a multi-stage connection amplifier in a semiconductor integrated circuit, specifically to a signal processing LSI (Large Scale Integrated semiconductor circuit) of the direct conversion system that processes transmission/reception signals, which is used in a portable telephone, for example.
Traditionally, the so-called super-heterodyne system is adopted by a wireless communication LSI that processes transmission/reception signals, which is used in a portable telephone. As a reception circuit of the super-heterodyne system, the construction as shown in FIG. 10 can be put forth as an example. That is, the reception circuit includes a band restriction filter (FLT) 111 made up with a SAW filter that rejects spurious waves from signals received by an antenna AT, a low noise amplifier (LNA) 112 that amplifies a signal passed through the filter 111, a mixer (MIX) 113 that converts an amplified reception signal down to an intermediate frequency signal by synthesizing the amplified reception signal and a local oscillation signal from an oscillator 130 (not illustrated), a band pass filter (BPF) 114 that passes a signal of a frequency corresponding to the frequency difference of the reception signal and the local oscillation signal, a programmable gain amplifier (PGA) 115 that can amplify a signal to a desired level, and a demodulator (DeMOD) 116 that demodulates a signal having the amplitude regulated to a desired level into an audio-frequency base band signal (I/Q).